pmacs/tests
Levi Neuwirth b6c07cb840 M10.11: adversarial two-laptop acceptance + jitter; the M10 arc verified
The M10 acceptance milestone (two-laptop edit). Framing-pass review
reframed it from confirmatory to **adversarial** verification: the
verification-milestone premise check (M10.11's own discipline,
extracted at M10.10 Day-4) caught its own first-draft framing
asserting "the architecture is complete; this is the verification
milestone" — M10.10's initial verdict was wrong and took six
post-audit rounds, so the M10 arc's correctness is not safely
assumable. M10.11 actively tries to break the arc rather than
confirm it.

Implementation (src/daemon.rs, tests/m10_11_acceptance.rs,
tests/m10_11_perf.rs; prior-pass synthesis/PTY-doubled/Drop-guard
fixtures landed in 05fbbd9's tree, completed here):

- Jitter seam: PMACS_INSTANCE_LATENCY_JITTER_MS + _SEED (SplitMix64,
  no-unsafe/no-dep, default 0xC0FFEE). Q6's "no new injection seams"
  preserved — one sleep-site; jitter-mode delays CellDelta|CrdtOp,
  fixed-latency mode stays CellDelta-only so criterion-1 behavior is
  byte-identical. No drops (Tension B: "packet loss" = latency
  variation only).
- Q13 adversarial scenarios: cat-1 (concurrent same-position
  inserts → deterministic peer-id tiebreak, pinned "A1B1"), cat-2
  (per-frontend undo under causally-pending delayed delivery → B's
  no-op undo doesn't reach A's ops; converge "12"), cat-3 narrowed
  (CRDT state converges across reattach via BufferSnapshot, pinned
  "a1b1"; undo-across-reattach deliberately NOT asserted per
  Finding 4).
- Q8 convergence-under-jitter (seed-pinned; delivery-order-
  independent, pinned "aAbB").
- cat-1/cat-2 pass clean — the arc holds under attack at runtime.

Five findings, all pre-embed (framing-time / Day-1 grep / Day-2
implementation), zero post-audit revision rounds (audit/framing/
prereq docs are gitignored internal-only; this message is the sole
version-controlled record):

- F1 (framing-time): verification-milestone premise check caught its
  own reframe — third arc instance of a discipline addition catching
  a contemporaneous failure.
- F2 (Day-1): framing cited stale fixture locations (β
  framing-pass-time incompleteness, not α temporal drift); Q3
  promotion already done by 05fbbd9's DRY refactor.
- F3 (Day-1): adversarial layer empirically absent in prior
  implementation — validates the reframe (everything confirmatory
  existed, nothing adversarial did).
- F4 (Day-1, M5.8-inherited): reconnect issues a fresh FrontendId
  (no handle_reattach), orphaning per-frontend undo across reattach.
  Classified C; v1.0 action B-i (MANUAL-TEST-CHECKLIST Scenario 4
  documents the limitation honestly + workaround) + B-ii
  (V0.2-PREREQUISITES: SO_PEERCRED-min / token-extended paths).
  Fourth end-to-end-exercise case; first extending the pattern
  beyond M10.8 to a second prior milestone (M5.8).
- F5 (Day-2): Q6×Q8 composition miss — jitter target (CellDelta) ≠
  criterion-3 assertion target (CrdtOp); caught pre-embed by the
  composition-consistency discipline; resolved (B). M10.11-internal
  composition miss (M10.10 Finding-2/4 shape), not inherited.

Scorecard (Option C dual): layer (a) 6/8 milestones-not-findings
(M10.11 joins M10.10 via F5's composition cluster) / 1/8
findings-as-failures; layer (c) 6/8 (M5.8 joins M10.8 via F4;
two clusters — CRDT-pipeline {F1,F3,F5a-M10.8}, reconnect-identity
{F4-M5.8}). Dual-value: layer (a) prediction failed on F5;
pause-point value held (caught pre-embed). M10.11's 5-finding
density empirically validates M10.10's predictive-density model —
property-(b)-at-max, no (a)/(c) → moderate, all pre-embed, zero
post-audit rounds. First validation of the model M10.10 produced.

Verification (clean checkout): lib luajit+crdt 1364/1364, luajit
1211/1211; m5_5 crdt 36/36 (criterion-1 byte-preserved through the
latency-site restructure) + non-crdt 15/15; m10_11 CI-default 5/5
(3 PTY-doubled #[ignore]d, operator-invoked pre-tag); clippy 0
both lanes; fmt clean.

The M10 arc is verified. v1.0 ships after M10.12 (release tag +
TRANSITION-M10.md + collaboration user guide, which inherits the
Scenario-4 honest wording).

Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
2026-05-15 20:51:00 -04:00
..
common M10.10: complete optimistic-apply keystroke path + Day-5 corrections 2026-05-15 16:40:46 -04:00
fixtures M9 ship gate 2026-05-09 15:04:23 -04:00
acceptance.rs Initial commit: v0.1.0 2026-05-03 19:51:06 -04:00
m3_acceptance.rs Initial commit: v0.1.0 2026-05-03 19:51:06 -04:00
m4_acceptance.rs M10.10 ship gate 2026-05-13 16:28:46 -04:00
m5_5_acceptance.rs M10.10: complete optimistic-apply keystroke path + Day-5 corrections 2026-05-15 16:40:46 -04:00
m5_6_acceptance.rs Initial commit: v0.1.0 2026-05-03 19:51:06 -04:00
m5_7_acceptance.rs Initial commit: v0.1.0 2026-05-03 19:51:06 -04:00
m5_8_acceptance.rs M10.10: complete optimistic-apply keystroke path + Day-5 corrections 2026-05-15 16:40:46 -04:00
m5_perf_acceptance.rs M10.10 ship gate 2026-05-13 16:28:46 -04:00
m6_4_repl_acceptance.rs Fix PTY final-output drain race 2026-05-04 09:44:30 -04:00
m6_5_repl_acceptance.rs Fix CI and Documentation issues 2026-05-04 10:19:19 -04:00
m6_7_scrollback_acceptance.rs Initial commit: v0.1.0 2026-05-03 19:51:06 -04:00
m6_8_multi_repl_acceptance.rs Initial commit: v0.1.0 2026-05-03 19:51:06 -04:00
m6_perf_acceptance.rs Initial commit: v0.1.0 2026-05-03 19:51:06 -04:00
m7_3_acceptance.rs Fix CI and Documentation issues 2026-05-04 10:19:19 -04:00
m7_5_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m7_6_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m7_7_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m7_8_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m7_9_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m7_10_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m7_11_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m7_review_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m8_1_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m8_1c_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m8_1d_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m8_2_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m8_3_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m8_5_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m8_6_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m8_7_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m8_9_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m8_10_acceptance.rs M7 tail: package system, audit lint, lockfile, resolver 2026-05-07 16:50:37 -04:00
m9_1_acceptance.rs M9 ship gate 2026-05-09 15:04:23 -04:00
m9_2_acceptance.rs M9 ship gate 2026-05-09 15:04:23 -04:00
m9_3_acceptance.rs M9 ship gate 2026-05-09 15:04:23 -04:00
m9_4_acceptance.rs M9 ship gate 2026-05-09 15:04:23 -04:00
m9_5_acceptance.rs M9 ship gate 2026-05-09 15:04:23 -04:00
m9_6_acceptance.rs M9 ship gate 2026-05-09 15:04:23 -04:00
m9_7_acceptance.rs M9 ship gate 2026-05-09 15:04:23 -04:00
m9_8_acceptance.rs M9 ship gate 2026-05-09 15:04:23 -04:00
m10_2_perf.rs M10.10 ship gate 2026-05-13 16:28:46 -04:00
m10_10_perf.rs M10.10 ship gate 2026-05-13 16:28:46 -04:00
m10_10_postcard_unknown_variant.rs M10.10 ship gate 2026-05-13 16:28:46 -04:00
m10_11_acceptance.rs M10.11: adversarial two-laptop acceptance + jitter; the M10 arc verified 2026-05-15 20:51:00 -04:00
m10_11_perf.rs M10.11: adversarial two-laptop acceptance + jitter; the M10 arc verified 2026-05-15 20:51:00 -04:00